Team Lead Digital Verification
Qualinx B.V.
Delft
2 days ago
Team Lead Digital Verification
Qualinx, a pioneering semiconductor scale-up based in Delft, is seeking a Team Lead Digital ASIC Verification Engineer. The role involves leading verification of digital IP blocks, developing UVM-based testbenches, and post-layout simulation for mixed-signal SoCs. Requires 10+ years of ASIC verification experience and prior team lead experience.
Hybrid
Full-time
Lead
System Verilog
UVM
Salary
Not specified
Core Qualifications
Technical (Must-have)
System VerilogUVMVerilogRTLMATLABC/C++TclCadenceMentorDFT
Soft Skills
problem-solvinganalyticalproactivecan-do attitudeteam spirit
Key Responsibilities
- Responsible for ASIC verification, System Verilog, and UVM.
- Simulation and verification of digital block implementation in RTL for various functions.
- Post-layout simulation of complex mixed-signal SoC.
- Develop test benches and test cases for block-level functional verification.
- Work with backend and implementation teams on synthesis, timing, DFT issues.
- Understand design integration activities like Lint, CDC, Synthesis & ECO.
- Define verification and test plan, run regressions, debug functional and performance bugs.
- Verify various IPs/Sub IPs integrated to top level SoC.
- Understand design synthesis and fix timing issues for Physical Design team.
ASIC VerificationDigitalSemiconductorGNSSIoTUVMSystem VerilogSoCTeam LeadDelft